Skip to content
Welcome To Our Store.
100,000+ Products for Home, Medical, Office & Classroom Needs
Search
Skip to product information
1 of 2

Software Synthesis from Dataflow Graphs - Hardcover

$178.18 USD
$178.18 USD
Sale Sold out
Shipping calculated at checkout.
In stock (100 units), ready to be shipped

Available Offers

Fast delivery available on most orders

Multiple secure payment options accepted

Secure checkout with
  • American Express
  • Apple Pay
  • Diners Club
  • Discover
  • Google Pay
  • Mastercard
  • PayPal
  • Shop Pay
  • Visa

Flight Range: Up to 1,000 meters (3,280 feet)

Maximum Speed: 45 kilometers per hour (28 miles per hour)

For all orders exceeding a value of 100USD shipping is offered for free.

Returns will be accepted for up to 10 days of Customer’s receipt or tracking number on unworn items. You, as a Customer, are obliged to inform us via email before you return the item.

Otherwise, standard shipping charges apply. Check out our delivery Terms & Conditions for more details.

View Product Details
Shopping cart
Product Product subtotal Quantity Price Product subtotal
Software Synthesis from Dataflow Graphs - Hardcover
Software Synthesis from Dataflow Graphs - Hardcover
Software Synthesis from Dataflow Graphs - Hardcover
$178.18/ea
$0.00
$178.18/ea $0.00

Product Description

by Shuvra S. Bhattacharyya (Author), Praveen K. Murthy (Author), Edward A. Lee (Author)

Software Synthesis from Dataflow Graphs addresses the problem of generating efficient software implementations from applications specified as synchronous dataflow graphs for programmable digital signal processors (DSPs) used in embedded real- time systems. The advent of high-speed graphics workstations has made feasible the use of graphical block diagram programming environments by designers of signal processing systems. A particular subset of dataflow, called Synchronous Dataflow (SDF), has proven efficient for representing a wide class of unirate and multirate signal processing algorithms, and has been used as the basis for numerous DSP block diagram-based programming environments such as the Signal Processing Workstation from Cadence Design Systems, Inc., COSSAP from Synopsys(R) (both commercial tools), and the Ptolemy environment from the University of California at Berkeley.
A key property of the SDF model is that static schedules can be determined at compile time. This removes the overhead of dynamic scheduling and is thus useful for real-time DSP programs where throughput requirements are often severe. Another constraint that programmable DSPs for embedded systems have is the limited amount of on-chip memory. Off-chip memory is not only expensive but is also slower and increases the power consumption of the system; hence, it is imperative that programs fit in the on-chip memory whenever possible.
Software Synthesis from Dataflow Graphs reviews the state-of-the-art in constructing static, memory-optimal schedules for programs expressed as SDF graphs. Code size reduction is obtained by the careful organization of loops in the target code. Data buffering is optimized by constructing the loop hierarchy in provably optimal ways for many classes of SDF graphs. The central result is a uniprocessor scheduling framework that provably synthesizes the most compact looping structures, called singleappearance schedules, for a certain class of SDF graphs. In addition, algorithms and heuristics are presented that generate single appearance schedules optimized for data buffering usage. Numerous practical examples and extensive experimental data are provided to illustrate the efficacy of these techniques.

Number of Pages: 190
Dimensions: 0.66 x 9.78 x 6.36 IN
Illustrated: Yes
Publication Date: January 01, 2001
you might like